By Esteban Tlelo-Cuautle
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Hence, an n-port device can be removed from a circuit and replaced by n fixators with the same biasing currents and voltages without inflicting any changes within the rest of the circuit. For example an MOS device can be completely modeled by using three fixators. Figure 12 shows the complete fixator-models for nMOS and pMOS transistors, neglecting the substrate effects. Similarly, Fig. 13 depicts the complete fixator-models for npn and pnp transistors. Again, the models represent the devices with the same voltages Fig.
0 Table VI. The Amplifier design Values for the Norators VDD = 5 V M1 AC V DD = 5 V 80 KΩ R2 vin M1 Vout AC VI = 3 V Fx(VDS 2, ID2) Fx(VGS 2, 0) V out vin M2 VI = 3 V VB = 2 V Fx(V SD1, I D1) 2 KΩ VB R1 (a) (b) Fig. 15. (a) mixture of complete and partial modeling in the cascade CMOS amplifier; (b) the amplifier with biasing design completed. Finally, a complete design of the cascade amplifier is depicted in Fig. 15(b). Figure 16 shows the transient response of the amplifier with a full output swing with negligible distortion.
The biasing design typically comes last, except for possible circuit modification that may require us to go back to the performance design, repeatedly. We only deal with the biasing situation in this chapter. A full discussion on the performance design and other related circuit design issues can be found in the literature . Our approach to designing analog circuit biasing starts with a circuit topology (structure) that is suitable for the design. There is, of course, no restriction on this topology and structural modifications are acceptable during the design, as long as the final structure can fulfill the design criteria.
Advances in Analog Circuits by Esteban Tlelo-Cuautle